Features
• Open NAND Flash Interface (ONFI) 2.2-compliant1 • Multiple-level cell (MLC) technology • Organization – Page size x8: 4320 bytes (4096 + 224 bytes) – Block size: 256 pages (1024K + 56K bytes) – Plane size: 2 planes x 1024 blocks per plane – Device size: 16Gb: 2048 blocks; 32Gb: 4096 blocks • Synchronous I/O performance – Up to synchronous timing mode 4 – Clock rate: 12ns (DDR) – Read/write throughput per pin: 166 MT/s • Asynchronous I/O performance – Up to asynchronous timing mode 5 – Read/write throughput per pin: 50 MT/s – tRC/tWC: 20ns (MIN) • Array performance – Read page: 75µs (MAX) – Program page: 1300µs (TYP) – Erase block: 3.8ms (TYP) • Operating Voltage Range – VCC: 2.7–3.6V – VCCQ: 2.7–3.6V • Command set: ONFI NAND Flash Protocol • Advanced Command Set – Program cache – Read cache sequential – Read cache random – One-time programmable (OTP) mode – Multi-plane commands – Multi-LUN operations – Read unique ID – Copyback • First block (block address 00h) is valid when shipped from factory. For minimum required ECC, see Error Management (page 97). • RESET (FFh) required as first command after power-on
